The present disclosure relates to a method for fabricating a trench structure, and to a semiconductor arrangement including a trench structure.
Trench structures, also known as trenches, principally find application in semiconductor technology for isolating integrated components and storage capacitors in dynamic memories (DRAMs). However special applications are also known for power semiconductor components, such as e.g., for a Trench Extended Drain Region Filed-effect Transistor (TEDFET). The construction of a TEDFET is described in the published patent application DE 10 2005 039 331.
In this case, the trend is towards ever narrower and at the same time deeper trench structures. One important measure of this is the aspect ratio, that is to say the ratio of depth to width of the trench.
Trench structures are generally produced by anisotropic etching processes, in particular by dry etching processes. Trench structures having an aspect ratio of 80:1 can be fabricated thereby at the present time.
For these and other reasons there is a need for the present invention.